This invention relates to the field of integrated circuits (also known as "chips"). More specifically, the present invention is a system for generating high voltages for an integrated circuit, especially useful for enhancing and speeding the critical path and also programming the memory cells of the integrated circuit.
Many integrated circuits require high voltages. For example, there are numerous integrated circuits with electrically programmed (or erased) memory cells such as programmable logic devices (PLDs) and EPROM, EEPROM, and Flash memories. These may be fabricated using technologies including electrically programmable read-only memory (EPROM) cells, electrically erasable programmable read-only memory (EEPROM) cells, Flash, antifuse, as well as many others. Many times, these memories use cells having floating gates. To program these cells, high voltages are used to transfer charge to the floating gates through the silicon dioxide by various physical mechanisms such as avalanche injection, channel injection, quantum-mechanical tunneling, and other phenomena. To erase the cells, for EEPROM and Flash memory cells, charge is electrically removed from the floating gate using high voltages; while for EPROM memory cells, charge is removed from the floating gates by exposing the cells to radiation, such as ultraviolet light. After erasure, the memory cells may be reprogrammed. Moreover, EPROM, EEPROM, and Flash memory cells may be programmed, erased, and reprogrammed many times.
Typically, the VDD (or VCC) of the integrated circuit is used for the normal (e.g., nonprogramming) operation of these memory cells. VDD is usually 5 volts, although 3.3-volt supplies are also common. As device and feature sizes on integrated circuits continue to shrink, future supply voltages may be reduced even further to, for example, 2.5 volts.
To program (and in some case, to erase) these memory cells, however, a higher potential than VDD is usually needed. Depending on the processing technology used, the internal integrated circuit voltages used to program these memory cells may be from 7 volts to 20 volts or more. For some integrated circuits, these high voltages are generated externally or off-chip. However, numerous charge pumping circuits are known for generating high potentials from a lower potential to allow internally generated high voltages.
Further, these high voltage generators may be used during normal chip operation to provide high voltages to critical path and other circuitry to enhance and speed-up the operation of many integrated circuits, including memories, microprocessors, application specific integrated circuits (ASICs), and programmable logic devices (PLDs). PLDs are well known to those in the electronic art. Such programmable logic devices are commonly referred to as PALs (Programmable Array Logic), PLAs (Programmable Logic Arrays), FPLAs (Field Programmable Logic Arrays), PLDs (Programmable Logic Devices), EPLDs (Erasable Programmable Logic Devices), EEPLDs (Electrically Erasable Programmable Logic Devices), LCAs (Logic Cell Arrays), FPGAs (Field Programmable Gate Arrays), and the like. Such devices are used in a wide array of applications where it is desirable to program standard, off-the-shelf devices for a specific application. Such devices include, for example, the well-known, Classic.TM., and MAX.RTM. 5000, MAX.RTM. 7000, and FLEX.RTM. 8000 EPLDs made by Altera Corp.
PLDs are generally known in which many logic arrays blocks (LABs) are provided in a two-dimensional array. Further, PLDs have an array of intersecting signal conductors for programmably selecting and conducting logic signals to, from, and between the LABs. LABs contain a number of individual programmable logic elements (LEs) which provide relatively elementary logic functions such as NAND, NOR, and exclusive OR. The configuration of these PLDs are typically controlled by way of programmable memory cells, often requiring high voltage circuitry for programming. These cells include DRAM, SRAM, EPROM, EEPROM, and Flash memories. As integrated circuits become smaller and denser, it becomes possible to put greater numbers of programmable logic elements, and consequently more programmable memory cells, onto one integrated circuit. Hence, it becomes increasingly important to improve the techniques and architectures used for programming the programmable elements and enhancing the performance of PLDs.
Therefore, while existing high voltage pumping schemes have met with substantial success, such schemes also meet with certain limitations. In particular, such on-chip charge pumping circuits and voltage generators may consume significant amounts of power, often are relatively difficult to design and fabricate, operate somewhat inefficiently, may interfere with the operation of other devices on the integrated circuit, and may also be quite large, requiring a considerable amount of substrate area.
As can be seen, an improved technique for generating high voltages is needed, especially a scheme with improved efficiency, enhanced operating characteristics, and reduced size.